It is anticipated that you will use a LOOK-UP table to produce the digital data for the DAC.
To setup such a table in VHDL, you should do the following:
(Between "ARCHITECTURE" and the "BEGIN" statement, include:
TYPE LU_TABLE is array(0 to n) of std_logic_vector (k downto 0); CONSTANT AV: LU_TABLE := ( "1011...", "1100..." .... "1110...");Then, to use this table, you would use a statement like:
DAC_OUT<=AV(x)Where x is some variable.